COA Tutorial
Basic CO and Design
Computer Instructions
Digital Logic Circuits
Map Simplification
Combinational Circuits
Flip - Flops
Digital Components
Register Transfer
Micro-Operations
Memory Organization
COA_Misc
- Booth's Multiplication Algorithm
- Branch Instruction in Computer Organization
- Data Representation in Computer Organization
- ALU and Data Path in Computer Organization
- External memory in Computer Organization
- Structured Computer Organization
- Types of Register in Computer Organization
- Secondary Storage Devices in Computer Organization
- Types of Operands in Computer Organization
- Serial Communication in Computer organization
- Addressing Sequencing in Computer Organization
- Simplified Instructional Computer (SIC)
- Arithmetic Instructions in AVR microcontroller
- Conventional Computing VS Quantum Computing
- Instruction set used in Simplified Instructional Computer
- Branch Instruction in AVR microcontroller
- Conditional Branch instruction in AVR Microcontroller
- Data transfer instruction in AVR microcontroller
- Difference between Memory-based and Register-based addressing modes
- Difference between 1's complement Representation and 2's complement Representation
- CALL Instructions and Stack in AVR Microcontroller
- Difference between Call and Jump Instructions
- Overflow in Arithmetic Addition in Binary number System
- Horizontal Micro-programmed Vs. Vertical Micro-programmed Control Unit
- Hardwired Vs. Micro-programmed Control Unit
- Non-Restoring Division Algorithm for Unsigned Integer
- Restoring Division Algorithm for Unsigned Integer
- Debugging a Machine-level Program
- Dependencies and Data Hazard in pipeline in Computer Organization
- Execution, Stages and Throughput in Pipeline
- Types of Pipeline Delay and Stalling
- Timing Diagram of MOV Instruction
- Advantages and Disadvantages of Flash Memory
- Importance/Need of negative feedback in amplifiers
- Anti-Aliasing - Computer Graphics
- Bus Arbitration in Computer Organization
- Convert a number from Base 2 (Binary) to Base 6
- Cache Coherence
- EHCI
- Cache Memory and Virtual Memory
- Electrical Potential and Potential Difference
- RAM and Cache
- SIM and RIM instructions in 8085 processor
- Clusters in Computer Organization
- Data Types and Addressing Modes of 80386/80386DX Microprocessor
Encoders
An encoder can also be described as a combinational circuit that performs the inverse operation of a decoder. An encoder has a maximum of 2^n (or less) input lines and n output lines.
In an Encoder, the output lines generate the binary code corresponding to the input value.
The following image shows the block diagram of a 4 * 2 encoder with four input and two output lines.
The truth table for a 4-to-2 line encoder can be represented as:
A3 | A2 | A1 | A0 | D1 | D0 |
---|---|---|---|---|---|
0 | 0 | 0 | 1 | 0 | 0 |
0 | 0 | 1 | 0 | 0 | 1 |
0 | 1 | 0 | 0 | 1 | 0 |
1 | 0 | 0 | 0 | 1 | 1 |
From the truth table, we can write the Boolean function for each output as:
D1 = A3 + A2 D0 = A3 + A1
The circuit diagram for a 4-to-2 line encoder can be represented by using two input OR gates.
The most common application of an encoder is the Octal-to-Binary encoder. Octal to binary encoder takes eight input lines and generates three output lines.
The following image shows the block diagram of an 8 * 3 line encoder.
The truth table for an 8 * 3 line encoder can be represented as:
D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 | x | y | z |
---|---|---|---|---|---|---|---|---|---|---|
0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 |
0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 |
0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 0 |
0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 1 |
0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 |
1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 |
From the truth table, we can write the Boolean function for each output as:
x = D4 + D5 + D6 + D7 y = D2 + D3 + D6 + D7 z = D1 + D3 + D5 + D7
The circuit diagram for an 8 * 3 line encoder can be represented by using two input OR gates.